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Hierarchical multithreading: programming model and system software

Gao, Guang R. and Sterling, Thomas and Stevens, Rick and Hereld, Mark and Zhu, Weirong (2006) Hierarchical multithreading: programming model and system software. In: 20th International Parallel and Distributed Processing Symposium, 2006. IPDPS 2006. IEEE , Piscataway, NJ. ISBN 1-4244-0054-6. https://resolver.caltech.edu/CaltechAUTHORS:20161025-170134160

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Abstract

This paper addresses the underlying sources of performance degradation (e.g. latency, overhead, and starvation) and the difficulties of programmer productivity (e.g. explicit locality management and scheduling, performance tuning, fragmented memory, and synchronous global barriers) to dramatically enhance the broad effectiveness of parallel processing for high end computing. We are developing a hierarchical threaded virtual machine (HTVM) that defines a dynamic, multithreaded execution model and programming model, providing an architecture abstraction for HEC system software and tools development. We are working on a prototype language, LITL-X (pronounced "little-X") for latency intrinsic-tolerant language, which provides the application programmers with a powerful set of semantic constructs to organize parallel computations in a way that hides/manages latency and limits the effects of overhead. This is quite different from locality management, although the intent of both strategies is to minimize the effect of latency on the efficiency of computation. We work on a dynamic compilation and runtime model to achieve efficient LITL-X program execution. Several adaptive optimizations were studied. A methodology of incorporating domain-specific knowledge in program optimization was studied. Finally, we plan to implement our method in an experimental testbed for a HEC architecture and perform a qualitative and quantitative evaluation on selected applications.


Item Type:Book Section
Related URLs:
URLURL TypeDescription
http://dx.doi.org/10.1109/IPDPS.2006.1639574DOIArticle
http://ieeexplore.ieee.org/document/1639574/PublisherArticle
Additional Information:© 2006 IEEE. We acknowledge the support from the National Science Foundation (CNS-0509332) and Laboratory Director Research and Development funding, IBM, ETI,and other government sponsors. We acknowledge Hongbo Rong, who has been instrumental in the development and documentation of some key ideas in this paper. We would also like to acknowledge other members at the CAPSL group, who provide a stimulus environment for scientific discussions and collaborations, in particular Ziang Hu, Juan del Cuvillo, and Ge Gan.
Funders:
Funding AgencyGrant Number
NSFCNS-0509332
Argonne National LaboratoryUNSPECIFIED
IBMUNSPECIFIED
ETIUNSPECIFIED
DOI:10.1109/IPDPS.2006.1639574
Record Number:CaltechAUTHORS:20161025-170134160
Persistent URL:https://resolver.caltech.edu/CaltechAUTHORS:20161025-170134160
Usage Policy:No commercial reproduction, distribution, display or performance rights in this work are provided.
ID Code:71485
Collection:CaltechAUTHORS
Deposited By:INVALID USER
Deposited On:26 Oct 2016 18:53
Last Modified:11 Nov 2021 04:46

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