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The first asynchronous microprocessor: the test results

Martin, Alain J. and Burns, Steven M. and Lee, T. K. and Borkovic, Drazen and Hazewindus, Pieter J. (1989) The first asynchronous microprocessor: the test results. ACM SIGARCH Computer Architecture News, 17 (4). pp. 95-98. ISSN 0163-5964. doi:10.1145/71317.71324. https://resolver.caltech.edu/CaltechAUTHORS:20161130-145428229

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Abstract

We have designed the first entirely asynchronous (also called self-timed or delay-insensitive) microprocessor. The design was reported at the Decennial Caltech Conference on VLSI, last March. The conference paper is included here as an appendix. Since the chips had not yet been fabricated at the moment of writing the conference paper, the paper does not include the results of the experiment. The purpose of this note is to publish these results, which are quite remarkable because of the speed reached on this first design, and, as importantly, because of the surprising robustness of the chips to variations in temperature and VDD voltage values.


Item Type:Article
Related URLs:
URLURL TypeDescription
https://doi.org/10.1145/71317.71324DOIArticle
http://dl.acm.org/citation.cfm?doid=71317.71324PublisherArticle
Additional Information:© 1989 ACM.
Issue or Number:4
DOI:10.1145/71317.71324
Record Number:CaltechAUTHORS:20161130-145428229
Persistent URL:https://resolver.caltech.edu/CaltechAUTHORS:20161130-145428229
Official Citation:A. J. Martin, S. M. Burns, T. K. Lee, D. Borkovic, and P. J. Hazewindus. 1989. The first asynchronous microprocessor: the test results. SIGARCH Comput. Archit. News 17, 4 (June 1989), 95-98. DOI=http://dx.doi.org/10.1145/71317.71324
Usage Policy:No commercial reproduction, distribution, display or performance rights in this work are provided.
ID Code:72468
Collection:CaltechAUTHORS
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Deposited On:30 Nov 2016 23:06
Last Modified:11 Nov 2021 05:01

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