A 50 nanosecond linear gate circuit using transistors

Barna, Arpad and Marshall, J. Howard (1961) A 50 nanosecond linear gate circuit using transistors. Synchrotron Laboratory, CTSL-18. California Institute of Technology , Pasadena, CA. (Unpublished) https://resolver.caltech.edu/CaltechAUTHORS:20170109-092857597

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Abstract

In the past, linear gate circuits for gating pulses of photomultiplier tubes have been mostly based on semiconductor diodes. Using diffused base transistors as a gate in an emitter input configuration provides favorable linearity and feedthrough properties. The circuit described here is an improved version of one developed by A. V. Tollestrup.

Item Type:

Report or Paper (Technical Report)

Additional Information:

© 1961 California Institute of Technology. Supported in part by the U.S. Atomic Energy Commission Contract No. ΑΤ(11-1)-68. The valuable comments and suggestions of M. Sands and A. V. Tollestrup are gratefully acknowledged.

Group:

Synchrotron Laboratory

Funders:

Funding Agency	Grant Number
U.S. Atomic Energy Commission	ΑΤ-(11-1)- 68

Other Numbering System:

Other Numbering System Name	Other Numbering System ID
CTSL	18

Series Name:

Synchrotron Laboratory

Issue or Number:

CTSL-18

DOI:

10.7907/Z9SF2T66

Record Number:

CaltechAUTHORS:20170109-092857597

Persistent URL:

https://resolver.caltech.edu/CaltechAUTHORS:20170109-092857597

Usage Policy:

No commercial reproduction, distribution, display or performance rights in this work are provided.

ID Code:

73326

Collection:

CaltechAUTHORS

Deposited By:

Ruth Sustaita

Deposited On:

09 Jan 2017 18:33

Last Modified:

03 Oct 2019 16:26

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