Wong, Catherine G. and Martin, Alain J. (2003) High-level synthesis of asynchronous systems by data-driven decomposition. In: DAC '03 Proceedings of the 40th annual Design Automation Conference. ACM , New York, NY, pp. 508-513. ISBN 1-58113-688-9. https://resolver.caltech.edu/CaltechAUTHORS:20170109-145144866
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Abstract
We present a method for decomposing a high-level program description of a circuit into a system of concurrent modules that can each be implemented as asynchronous pre-charge half-buffer pipeline stages (the circuits used in the asynchronous R3000 MIPS microprocessor). We apply it to designing the instruction fetch of an asynchronous 8051 microcontroller, with promising results. We discuss new clustering algorithms that will improve the performance figures further.
Item Type: | Book Section | |||||||||
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Additional Information: | © 2003 ACM. The research described in this paper was sponsored by the Defense Advanced Research Projects Agency and monitored by the Air Force under contract F29601-00-K-0184. | |||||||||
Funders: |
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Subject Keywords: | Design, Asynchronous VLSI, high-level synthesis | |||||||||
Classification Code: | B.7.1 [ VLSI ]; B.5.2 [ Automatic synthesis ] | |||||||||
DOI: | 10.1145/775832.775962 | |||||||||
Record Number: | CaltechAUTHORS:20170109-145144866 | |||||||||
Persistent URL: | https://resolver.caltech.edu/CaltechAUTHORS:20170109-145144866 | |||||||||
Official Citation: | Catherine G. Wong and Alain J. Martin. 2003. High-level synthesis of asynchronous systems by data-driven decomposition. In Proceedings of the 40th annual Design Automation Conference (DAC '03). ACM, New York, NY, USA, 508-513. DOI=http://dx.doi.org/10.1145/775832.775962 | |||||||||
Usage Policy: | No commercial reproduction, distribution, display or performance rights in this work are provided. | |||||||||
ID Code: | 73347 | |||||||||
Collection: | CaltechAUTHORS | |||||||||
Deposited By: | INVALID USER | |||||||||
Deposited On: | 10 Jan 2017 05:12 | |||||||||
Last Modified: | 11 Nov 2021 05:15 |
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