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A Scalable 6-to-18GHz Concurrent Dual-Band Quad-Beam Phased-Array Receiver in CMOS

Jeon, Sanggeun and Wang, Yu-Jiu and Wang, Hua and Bohn, Florian and Natarajan, Arun and Babakhani, Aydin and Hajimiri, Ali (2008) A Scalable 6-to-18GHz Concurrent Dual-Band Quad-Beam Phased-Array Receiver in CMOS. In: 2008 IEEE International Solid-State Circuits Conference - Digest of Technical Papers. IEEE , Piscataway, NJ, pp. 186-605. ISBN 978-1-4244-2010-0. https://resolver.caltech.edu/CaltechAUTHORS:20170418-173743211

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Abstract

This paper describes the general architecture and the signal-path behavior of a CMOS programmable phased-array receiver element that simultaneously operates at two frequencies between 6 and 18GHz (a tritave) while forming four independently controlled beams.


Item Type:Book Section
Related URLs:
URLURL TypeDescription
https://doi.org/10.1109/ISSCC.2008.4523119DOIArticle
http://ieeexplore.ieee.org/document/4523119/PublisherArticle
ORCID:
AuthorORCID
Natarajan, Arun0000-0003-3648-3844
Hajimiri, Ali0000-0001-6736-8019
Additional Information:© 2008 IEEE. This work was supported by ONR’s award #N00014-04-C-0588. We thank ONR and Raytheon, particularly J. DeFalco and R. Healy for their helpful feedback.
Funders:
Funding AgencyGrant Number
Office of Naval Research (ONR)N00014-04-C-0588
Record Number:CaltechAUTHORS:20170418-173743211
Persistent URL:https://resolver.caltech.edu/CaltechAUTHORS:20170418-173743211
Official Citation:S. Jeon et al., "A Scalable 6-to-18GHz Concurrent Dual-Band Quad-Beam Phased-Array Receiver in CMOS," 2008 IEEE International Solid-State Circuits Conference - Digest of Technical Papers, San Francisco, CA, 2008, pp. 186-605. doi: 10.1109/ISSCC.2008.4523119
Usage Policy:No commercial reproduction, distribution, display or performance rights in this work are provided.
ID Code:76648
Collection:CaltechAUTHORS
Deposited By: Kristin Buxton
Deposited On:19 Apr 2017 17:24
Last Modified:09 Mar 2020 13:19

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