Sterling, Thomas and Kogge, Peter (2004) Custom-Enabled System Architectures for High End Computing. In: Innovative Architecture for Future Generation High-Performance Processors and Systems (IWIA'04). IEEE , Piscataway, NJ, pp. 30-39. ISBN 0-7695-2205-X. https://resolver.caltech.edu/CaltechAUTHORS:20170518-121847960
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Abstract
The US Federal Government has convened a major committee to determine future directions for government sponsored high end computing system acquisitions and enabling research. The High End Computing Revitalization Task Force was inaugurated in 2003 involving all Federal agencies for which high end computing is critical to meeting mission goals. As part of the HECRTF agenda, a multi-day community wide workshop was conducted involving experts from academia, industry, and the national laboratories and centers to provide the broadest perspective on important issues related to the HECRTF purview. Among the most critical issues in establishing future directions is the relative merits of commodity based systems such as clusters and MPPs versus custom system architecture strategies. This paper presents a perspective on the importance and value of the custom architecture approach in meeting future US requirements in supercomputing. The contents of this paper reflect the ideas of the participants of the working group chartered to explore custom enabled system architectures for high end computing. As in any such consensus presentation, while this paper captures the key ideas and tradeoffs, it does not exactly match the viewpoint of any single contributor, and there remains much room for constructive disagreement and refinement of the essential conclusions.
Item Type: | Book Section | |||||||||
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Additional Information: | © 2004 IEEE. | |||||||||
DOI: | 10.1109/IWIA.2004.10014 | |||||||||
Record Number: | CaltechAUTHORS:20170518-121847960 | |||||||||
Persistent URL: | https://resolver.caltech.edu/CaltechAUTHORS:20170518-121847960 | |||||||||
Official Citation: | T. Sterling and P. Kogge, "Custom-Enabled System Architectures for High End Computing," Innovative Architecture for Future Generation High-Performance Processors and Systems, 2004. Proceedings, Maui, HI, 2004, pp. 30-39. doi: 10.1109/IWIA.2004.10014 | |||||||||
Usage Policy: | No commercial reproduction, distribution, display or performance rights in this work are provided. | |||||||||
ID Code: | 77577 | |||||||||
Collection: | CaltechAUTHORS | |||||||||
Deposited By: | INVALID USER | |||||||||
Deposited On: | 18 May 2017 19:30 | |||||||||
Last Modified: | 15 Nov 2021 17:32 |
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