Bartur, M. and Nicolet, M.-A. (1984) Utilization of NiSi_2 as an interconnect material for VLSI. IEEE Electron Device Letters, 5 (3). pp. 88-90. ISSN 0741-3106. doi:10.1109/EDL.1984.25841. https://resolver.caltech.edu/CaltechAUTHORS:20170726-174538830
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Abstract
The applicability of NiSi2as an interconnect material was investigated using narrow (5 µm- × 2600-µm) lines. 2500-Å-thick silicide lines were thermally oxidized to form a passivation layer of SiO_2 for the next metallization level. Isolation of more than 50 V for 2200-Å SiO_2 is achieved. The interconnect resistivity following the oxidation is 1.2-1.4 Ω. The maximum current capability of the lines was found to be > 5 × 106A/cm^2 and their stability under prolonged high current densities was demonstrated. We propose a scheme to increase the local metallization-level density using NiSi_2 as an interconnect.
| Item Type: | Article | |||||||||
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| Additional Information: | © 1984 IEEE. Manuscript received November 14, 1983; revised January 9, 1984. This work was supported in part by Mr. Arnold Applebaum, President of Solid-state Devices, Inc. | |||||||||
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| Issue or Number: | 3 | |||||||||
| DOI: | 10.1109/EDL.1984.25841 | |||||||||
| Record Number: | CaltechAUTHORS:20170726-174538830 | |||||||||
| Persistent URL: | https://resolver.caltech.edu/CaltechAUTHORS:20170726-174538830 | |||||||||
| Official Citation: | M. Bartur and M. A. Nicolet, "Utilization of NiSi2as an interconnect material for VLSI," in IEEE Electron Device Letters, vol. 5, no. 3, pp. 88-90, Mar 1984. doi: 10.1109/EDL.1984.25841 | |||||||||
| Usage Policy: | No commercial reproduction, distribution, display or performance rights in this work are provided. | |||||||||
| ID Code: | 79474 | |||||||||
| Collection: | CaltechAUTHORS | |||||||||
| Deposited By: | Kristin Buxton | |||||||||
| Deposited On: | 27 Jul 2017 02:32 | |||||||||
| Last Modified: | 15 Nov 2021 17:48 |
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