CCD speed-noise optimization at 1 MHz

Abstract

The Zwicky Transient Facility (ZTF)[1] is a CCD mosaic requiring 64 differential output channels to be transmitted to electronics located over 2 m from the CCDs and digitized with less than 10 e- read noise at 1 MHz pixel rate. To minimize pixel overhead, the Reset Gate pulse is generated inside the dewar by a pin driver controlled by a very short pulse using an LVDS interface. Overlapping serial clocks spanning the entire pixel are made entirely triangular with slopes tuned to cancel substrate return current and minimize high frequency content to improve common rejection by the fully differential signal path. We document the trade between settling time after charge dump and linearity and illustrate the desirability of generating both Summing Well and Reset Gate edge close to the CCD. The parallel clocking overhead is exacerbated in ZTF by ganging multiple CCDs but is hidden by overlapping the parallel shift with pixel readout. To suppress fixed pattern due to the concurrent parallel clocks, slow overlapped triangular waveforms panning the entire line time are employed to null the substrate current, in the same manner as the serials. Both noise and speed requirements are exceeded on all 64 channels, with margin. At all pixel rates the median noise is as good as can be expected for differential transmission being √2 times the single sided noise published in the data sheet for the CCD231- C6 CCDs. Linearity is preserved even at 840 ns pixel time, and crosstalk is less than 10 ppm.