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The reliability of semiconductor RAM memories with on-chip error-correction coding

Goodman, Rodney M. and Sayano, Masahiro (1991) The reliability of semiconductor RAM memories with on-chip error-correction coding. IEEE Transactions on Information Theory, 37 (3). pp. 884-896. ISSN 0018-9448. doi:10.1109/18.79957. https://resolver.caltech.edu/CaltechAUTHORS:20190314-142001446

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Abstract

The mean lifetimes are studied of semiconductor memories that have been encoded with an on-chip single error-correcting code along each row of memory cells. Specifically, the effects of single-cell soft errors and various hardware failures (single-cell, row, column, row-column, and entire chip) in the presence of soft-error scrubbing are examined. An expression is presented for computing the mean time to failure of such memories in the presence of these types of errors using the Poisson approximation; the expression has been confirmed experimentally to accurately model the mean time to failure of memories protected by single error-correcting codes. These analyses will enable the system designer to accurately assess the improvement in mean time to failure (MTTF) achieved by the use of error-control coding.


Item Type:Article
Related URLs:
URLURL TypeDescription
https://doi.org/10.1109/18.79957DOIArticle
Additional Information:© 1991 IEEE. Manuscript received November 27, 1990. This work was supported in part by NSF Grant MIP8711568. This work was presented in part at the International Symposium on Information Theory and Its Applications, Waikiki, HI, November 27-30, 1990. The authors would like to thank Robert J. McEliece for comments and suggestions
Funders:
Funding AgencyGrant Number
NSFMIP-8711568
Subject Keywords:Error-correction coding, random access memory, soft-error scrubbing, mean time to failure
Issue or Number:3
DOI:10.1109/18.79957
Record Number:CaltechAUTHORS:20190314-142001446
Persistent URL:https://resolver.caltech.edu/CaltechAUTHORS:20190314-142001446
Official Citation:R. M. Goodman and M. Sayano, "The reliability of semiconductor RAM memories with on-chip error-correction coding," in IEEE Transactions on Information Theory, vol. 37, no. 3, pp. 884-896, May 1991. doi: 10.1109/18.79957
Usage Policy:No commercial reproduction, distribution, display or performance rights in this work are provided.
ID Code:93841
Collection:CaltechAUTHORS
Deposited By: George Porter
Deposited On:14 Mar 2019 22:33
Last Modified:16 Nov 2021 17:01

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