Sarpeshkar, Rahul and Wattanapanitch, Woradorn and Rapoport, Benjamin I. and Arfin, Scott K. and Baker, Michael W. and Mandal, Soumyajit and Fee, Michale S. and Musallam, Sam and Andersen, Richard A. (2007) Low-Power Circuits for Brain-Machine Interfaces. In: 2007 IEEE International Symposium on Circuits and Systems. IEEE , Piscataway, NJ, pp. 2068-2071. ISBN 1-4244-0920-9. https://resolver.caltech.edu/CaltechAUTHORS:20190325-155828787
![[img]](https://authors.library.caltech.edu/style/images/fileicons/application_pdf.png) |
PDF
- Published Version
See Usage Policy. 1MB |
Use this Persistent URL to link to this item: https://resolver.caltech.edu/CaltechAUTHORS:20190325-155828787
Abstract
This paper presents work on ultra-low-power circuits for brain-machine interfaces with applications for paralysis prosthetics, prosthetics for the blind, and experimental neuroscience systems. The circuits include a micropower neural amplifier with adaptive power biasing for use in multi-electrode arrays; an analog linear decoding and learning architecture for data compression; radio-frequency (RF) impedance modulation for low-power data telemetry; a wireless link for efficient power transfer; mixed-signal system integration for efficiency, robustness, and programmability; and circuits for wireless stimulation of neurons. Experimental results from chips that have recorded from and stimulated neurons in the zebra-finch brain and from RF power-link systems are presented. Circuit simulations that have successfully processed prerecorded data from a monkey brain and from an RF data telemetry system are also presented.
| Item Type: | Book Section | ||||||
|---|---|---|---|---|---|---|---|
| Related URLs: |
| ||||||
| ORCID: |
| ||||||
| Additional Information: | © 2007 IEEE. | ||||||
| DOI: | 10.1109/iscas.2007.378505 | ||||||
| Record Number: | CaltechAUTHORS:20190325-155828787 | ||||||
| Persistent URL: | https://resolver.caltech.edu/CaltechAUTHORS:20190325-155828787 | ||||||
| Official Citation: | R. Sarpeshkar et al., "Low-Power Circuits for Brain-Machine Interfaces," 2007 IEEE International Symposium on Circuits and Systems, New Orleans, LA, 2007, pp. 2068-2071. doi: 10.1109/ISCAS.2007.378505 | ||||||
| Usage Policy: | No commercial reproduction, distribution, display or performance rights in this work are provided. | ||||||
| ID Code: | 94132 | ||||||
| Collection: | CaltechAUTHORS | ||||||
| Deposited By: | Tony Diaz | ||||||
| Deposited On: | 25 Mar 2019 23:28 | ||||||
| Last Modified: | 16 Nov 2021 17:03 |
Repository Staff Only: item control page
