Koosh, Vincent F. and Goodman, Rodney M. (2002) Analog VLSI neural network with digital perturbative learning. IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing, 49 (5). pp. 359-368. ISSN 1057-7130. doi:10.1109/TCSII.2002.802282. https://resolver.caltech.edu/CaltechAUTHORS:20190326-072808079
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Abstract
Two feed-forward neural-network hardware implementations are presented. The first uses analog synapses and neurons with a digital serial weight bus. The chip is trained in loop with the computer performing control and weight updates. By training with the chip in the loop, it is possible to learn around circuit offsets. The second neural network also uses a computer for the global control operations, but all of the local operations are performed on chip. The weights are implemented digitally, and counters are used to adjust them. A parallel perturbative weight update algorithm is used. The chip uses multiple, locally generated, pseudorandom bit streams to perturb all of the weights in parallel. If the perturbation causes the error function to decrease, the weight change is kept; otherwise, it is discarded. Test results from a very large scale integration (VLSI) prototype are shown of both networks successfully learning digital functions such as AND and XOR.
Item Type: | Article | ||||||
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Additional Information: | © 2002 IEEE. Manuscript received October 18, 2001; revised June 20, 2002. | ||||||
Subject Keywords: | Analog very large scale integration (VLSI), chip-in-loop training algorithm, learning, neural chips, neural network, neuromorphic, perturbation techniques, VLSI feed-forward neural network | ||||||
Issue or Number: | 5 | ||||||
DOI: | 10.1109/TCSII.2002.802282 | ||||||
Record Number: | CaltechAUTHORS:20190326-072808079 | ||||||
Persistent URL: | https://resolver.caltech.edu/CaltechAUTHORS:20190326-072808079 | ||||||
Official Citation: | V. F. Koosh and R. M. Goodman, "Analog VLSI neural network with digital perturbative learning," in IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing, vol. 49, no. 5, pp. 359-368, May 2002. doi: 10.1109/TCSII.2002.802282 | ||||||
Usage Policy: | No commercial reproduction, distribution, display or performance rights in this work are provided. | ||||||
ID Code: | 94135 | ||||||
Collection: | CaltechAUTHORS | ||||||
Deposited By: | Tony Diaz | ||||||
Deposited On: | 26 Mar 2019 15:33 | ||||||
Last Modified: | 16 Nov 2021 17:03 |
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