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A 25-Gb/s Avalanche Photodetector-Based Burst-Mode Optical Receiver With 2.24-ns Reconfiguration Time in 28-nm CMOS

Chen, Kuan-Chang and Emami, Azita (2019) A 25-Gb/s Avalanche Photodetector-Based Burst-Mode Optical Receiver With 2.24-ns Reconfiguration Time in 28-nm CMOS. IEEE Journal of Solid-State Circuits, 54 (6). pp. 1682-1693. ISSN 0018-9200. doi:10.1109/JSSC.2019.2902471.

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This paper describes an avalanche photodetector (APD)-based optical receiver, applicable to the burst-mode operation, in 28-nm CMOS technology. With the aims of benefiting the overall optical link power efficiency and link bandwidth, the optical receiver is designed to have high sensitivity and high reconfiguration speed for burst-mode operation. The sensitivity of the receiver is optimized by adjusting the responsivity of APD via its reverse bias voltage, which leads to the highest signal-to-noise ratio (SNR) at the front end. The two-tap feed-forward equalization (FFE), along with two-tap decision feedback equalization, is implemented in a current-integrating fashion to further improve the sensitivity with superior power efficiency to their resistively loaded counterparts. Integrating dc comparator and integrating amplitude comparator are proposed to replace the conventional RC low-pass filters and peak detectors, respectively, in extracting the information of dc offset and signal amplitude within two unit intervals (UIs), empowering significant acceleration of the burst-mode reconfiguration. When the APD is biased at −16 V, its overall responsivity at 1310 nm is 4 A/W, and the optical receiver achieves bit-error-rate (BER) better than 10^(−12) at −16-dBm optical modulation amplitude, 2.24-ns reconfiguration time with 5-dB dynamic range, and 1.37-pJ/b energy efficiency at 25 Gb/s.

Item Type:Article
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URLURL TypeDescription
Chen, Kuan-Chang0000-0003-2968-4656
Emami, Azita0000-0003-2608-9691
Additional Information:© 2019 IEEE. Manuscript received October 8, 2018; revised January 5, 2019 and February 15, 2019; accepted February 21, 2019. Date of publication March 26, 2019; date of current version May 24, 2019. This paper was approved by Associate Editor Hui Pan. The authors would like to thank D. A. Nelson, K. Muth, A. Zilkie of Rockley Photonics for their help and support; Caltech MICS Lab members and alumni, A. Agarwal, M. Monge, M. Raj, S. Saeedi, for technical discussions; and Caltech CHIC Lab for sharing testing resources.
Subject Keywords:Avalanche photodetector (APD), burst mode, current integrating, double sampling, equalization, optical, receiver, reconfiguration
Issue or Number:6
Record Number:CaltechAUTHORS:20190328-113108679
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Official Citation:K. C. Chen and A. Emami, "A 25-Gb/s Avalanche Photodetector-Based Burst-Mode Optical Receiver With 2.24-ns Reconfiguration Time in 28-nm CMOS," in IEEE Journal of Solid-State Circuits, vol. 54, no. 6, pp. 1682-1693, June 2019. doi: 10.1109/JSSC.2019.2902471
Usage Policy:No commercial reproduction, distribution, display or performance rights in this work are provided.
ID Code:94247
Deposited By: Tony Diaz
Deposited On:28 Mar 2019 18:44
Last Modified:16 Nov 2021 17:03

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