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Fault-tolerant sub-lithographic design with rollback recovery

Naeimi, Helia and DeHon, André (2008) Fault-tolerant sub-lithographic design with rollback recovery. Nanotechnology, 19 (11). p. 115708. ISSN 0957-4484. https://resolver.caltech.edu/CaltechAUTHORS:NAEnanot08

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Abstract

Shrinking feature sizes and energy levels coupled with high clock rates and decreasing node capacitance lead us into a regime where transient errors in logic cannot be ignored. Consequently, several recent studies have focused on feed-forward spatial redundancy techniques to combat these high transient fault rates. To complement these studies, we analyze fine-grained rollback techniques and show that they can offer lower spatial redundancy factors with no significant impact on system performance for fault rates up to one fault per device per ten million cycles of operation (Pf = 10^-7) in systems with 10^12 susceptible devices. Further, we concretely demonstrate these claims on nanowire-based programmable logic arrays. Despite expensive rollback buffers and general-purpose, conservative analysis, we show the area overhead factor of our technique is roughly an order of magnitude lower than a gate level feed-forward redundancy scheme.


Item Type:Article
Additional Information:© 2008 IOP Publishing Limited. Received 14 June 2007, in final form 5 September 2007. Published 19 February 2008. Print publication: Issue 11 (19 March 2008). Heather Quinn and an anonymous reviewer provided valuable feedback on early versions of this article which helped improve the clarity and presentation. This research was funded in part by National Science Foundation Grant CCF-0403674 and the Defense Advanced Research Projects Agency under ONR contract N00014-01-0651. This material is based upon work supported by the Department of the Navy, Office of Naval Research. Any opinions, findings and conclusions or recommendations expressed in this material are those of the authors and do not necessarily reflect the views of the National Science Foundation or the Office of Naval Research.
Issue or Number:11
Record Number:CaltechAUTHORS:NAEnanot08
Persistent URL:https://resolver.caltech.edu/CaltechAUTHORS:NAEnanot08
Alternative URL:http://dx.doi.org/10.1088/0957-4484/19/11/115708
Usage Policy:No commercial reproduction, distribution, display or performance rights in this work are provided.
ID Code:9654
Collection:CaltechAUTHORS
Deposited By: Archive Administrator
Deposited On:21 Feb 2008
Last Modified:03 Oct 2019 00:02

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