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Thermal Interface Materials Enhanced by Micro and Nanostructures

Lu, Mei-Chien (2018) Thermal Interface Materials Enhanced by Micro and Nanostructures. In: 2018 ASME International Technical Conference and Exhibition on Packaging and Integration of Electronic and Photonic Microsystems. American Society of Mechanical Engineers , New York, NY, Art. No. V001T04A009. ISBN 978-0-7918-5192-0. https://resolver.caltech.edu/CaltechAUTHORS:20190725-082926043

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Abstract

Thermal Interface materials are crucial elements for packaging of power electronics. In particular, development of high temperature lead free die-attach thermal interface materials for silicon carbide wide bandgap power electronics is a challenge. Failures of power electronics package modules often occur at die-attach areas. Among major options, sintered silver shows advantages in ease of applications. Cost, reliability, and integration are concerns for technology implementation. The current study first discusses issues and status reported in literatures. Then it focuses on cost reduction and improvement of sintered silver using enhancement structures at micro and nano scales. A few design architectures are analyzed by finite element methods. The feasibility of strengthening edges and corners is also assessed. The downside of potential increase of unfavorable stresses to accelerate void coalescence would be discussed in conjunction with design concept of power electronics package modules for paths of solutions in the form of integrated module systems.


Item Type:Book Section
Related URLs:
URLURL TypeDescription
https://doi.org/10.1115/ipack2018-8307DOIArticle
Additional Information:© 2018 ASME. Paper No. IPACK2018-8307.
Record Number:CaltechAUTHORS:20190725-082926043
Persistent URL:https://resolver.caltech.edu/CaltechAUTHORS:20190725-082926043
Official Citation:Lu M. Thermal Interface Materials Enhanced by Micro and Nanostructures. ASME. International Electronic Packaging Technical Conference and Exhibition, ASME 2018 International Technical Conference and Exhibition on Packaging and Integration of Electronic and Photonic Microsystems :V001T04A009. doi:10.1115/IPACK2018-8307
Usage Policy:No commercial reproduction, distribution, display or performance rights in this work are provided.
ID Code:97400
Collection:CaltechAUTHORS
Deposited By: Tony Diaz
Deposited On:25 Jul 2019 16:05
Last Modified:03 Oct 2019 21:31

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