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Published December 1, 2005 | public
Journal Article Open

A fully integrated 24-GHz phased-array transmitter in CMOS


This paper presents the first fully integrated 24-GHz phased-array transmitter designed using 0.18-/spl mu/m CMOS transistors. The four-element array includes four on-chip CMOS power amplifiers, with outputs matched to 50 /spl Omega/, that are each capable of generating up to 14.5 dBm of output power at 24 GHz. The heterodyne transmitter has a two-step quadrature up-conversion architecture with local oscillator (LO) frequencies of 4.8 and 19.2 GHz, which are generated by an on-chip frequency synthesizer. Four-bit LO path phase shifting is implemented in each element at 19.2 GHz, and the transmitter achieves a peak-to-null ratio of 23 dB with raw beam-steering resolution of 7/spl deg/ for radiation normal to the array. The transmitter can support data rates of 500 Mb/s on each channel (with BPSK modulation) and occupies 6.8 mm /spl times/ 2.1 mm of die area.

Additional Information

© Copyright 2005 IEEE. Reprinted with permission. Manuscript received April 26, 2005; revised July 15, 2005. Posted online: 2005-12-05. The authors would like to thank X. Guan and H. Hashemi for their technical contributions and discussions and B. Analui, A. Babakhani, E. Afshari, Prof. David Rutledge, and the anonymous reviewers for their suggestions and feedback. They would also like to acknowledge IBM Corporation for chip fabrication. N. Wadefalk and A. Shen assisted in printed circuit board preparation and packaging. The authors also thank the Lee Center for Advanced Networking for support.


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August 22, 2023
August 22, 2023