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Published May 2015 | metadata_only
Journal Article

Silicon Integrated 280 GHz Imaging Chipset With 4x4 SiGe Receiver Array and CMOS Source


In this paper, we report an integrated silicon-based active imaging chipset with a detector array in 0.13 μm SiGe process and a CMOS-based source array operating in the 240-290 GHz range. The chipset operates at room-temperature with no external RF or optical sources, high-resistivity silicon lenses (HRSi) or waveguides or any custom fabrication options, such as high-resistivity substrates or substrate thinning. The receiver chip consists of a 2-D array of 16 pixels, measuring 2.5 mm × 2.5 mm with integrated antennas. An electromagnetic-active circuit co-design approach is carried out to ensure high-efficiency interface with detectors operating above cut-off frequencies with good impedance matching, near-optimal noise performance, while simultaneously suppressing the dominant surface-wave modes in a lensless lossy bulk silicon substrate. The array performance is characterized in the WR-3 band between 220-320 GHz. At the designed frequency of 260 GHz, the NEP of all pixels stays between 7.9 pW/√{Hz}-8.8 pW/√{Hz}. The imaging chipset consists of this 2D detector array chip and a CMOS-based source array chip measuring 0.8 mm × 0.8 mm. The entire system dissipates less than 180 mW of DC power, representing a truly integrated solution.

Additional Information

© 2015 IEEE. Manuscript received July 31, 2014; revised November 26, 2014 and January 27, 2015; accepted March 03, 2015. Date of publication April 10, 2015; date of current version April 29, 2015. The authors would like to thank UMC, Taiwan, for providing fabrication facilities, and Prof. J. Zmuidzinas, Prof. G. Blake, D.Miller from Caltech, Pasadena, CA, USA, for providing some of the measurement equipments. The authors also acknowledge the help received regarding technical discussions from Dr. P. Siegel, Prof. D. Rutledge, and Dr. S. Weinreb.

Additional details

August 20, 2023
August 20, 2023