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Published December 2009 | Published
Journal Article Open

An Octave-Range, Watt-Level, Fully-Integrated CMOS Switching Power Mixer Array for Linearization and Back-Off-Efficiency Improvement


The power mixer array is presented as a novel power generation approach for non-constant envelope signals. It comprises several power mixer units that are dynamically turned on and off to improve the linearity and back-off efficiency. At the circuit level, the power mixer unit can operate as a switching amplifier to achieve high peak power efficiency. Additional circuit level linearization and back-off efficiency improvement techniques are also proposed. To demonstrate the feasibility of this idea, a fully-integrated octave-range CMOS power mixer array is implemented in a 130 nm CMOS process. It is operational between 1.2 GHz and 2.4 GHz and can generate an output power of +31.3 dBm into an external 50 Ω load with a PAE of 42% and a gain compression of only 0.4 dB at 1.8 GHz. It achieves a PAE of 25%, at an average output power of +26.4 dBm, and an EVM of 4.6% with a non-constant-envelope 16 QAM signal. It can also produce arbitrary signal levels down to -70 dBm of output power with the 16 QAM-modulated signal without any RF gain control circuit.

Additional Information

© 2009 IEEE. Manuscript received April 28, 2009; revised August 10, 2009. Current version published December 11, 2009. This paper was approved by Guest Editor Nikolaus Klemmer. The authors would like to thank the members of the CHIC group at Caltech, particularly Y. Wang and H. Wang for many helpful discussions, Hamdi Mani of Caltech, and Toshiba Corporation.

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Published - Kousai2009p6703Ieee_J_Solid-St_Circ.pdf


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August 21, 2023
August 21, 2023