A Phase Diagram for Morphology and Properties of Low Temperature Deposited Polycrystalline Silicon Grown by Hot-wire Chemical Vapor Deposition
The fabrication of low temperature polycrystalline silicon with internal surface passivation and with lifetimes close to single crystalline silicon is a promising direction for thin film polycrystalline silicon photovoltaics. To achieve high lifetimes, large grains with passivated low-angle grain boundaries and intragranular defects are required. We investigate the low-temperature (300-475 °C) growth of thin silicon films by hot-wire chemical vapor deposition (HWCVD) on Si (100) substrates and on large-grained polycrystalline silicon template layers formed by selective nucleation and solid phase epitaxy (SNSPE). Phase diagrams for dilute silane deposition varying substrate temperature and for pure silane varying hydrogen dilution are shown. We will discuss the relationship between the microstructure and photoconductive decay lifetimes of these undoped layers on Si (100) and SNSPE templates as well as their suitability for use in thin-film photovoltaic applications.
Additional Information© 2005 IEEE. Date of Current Version: 08 August 2005. The authors would like to thank C.M. Garland for her TEM analysis of the films on templates and R.K. Ahrenkiel for the RCPCD measurements. The authors would also like to thank BP Solar, NREL, and Corning Inc. for their financial support.
Published - RICpsc05.pdf