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Supporting information: Dynamic Light Manipulation via Silicon-Organic
Slot Metasurfaces
Tianzhe Zheng,
1
Yiran Gu,
2
Hyounghan Kwon,
1, 3,
Gregory Roberts,
1,
and Andrei Faraon
1, 3,
1
T. J. Watson Laboratory of Applied Physics and Kavli Nanoscience Institute,
California Institute of Technology, 1200 E. California Blvd., Pasadena, CA 91125, USA
2
Department of applied physics and material science,
California Institute of Technology, 1200 E. California Blvd., Pasadena, CA 91125, USA
3
Department of Electrical Engineering, California Institute of Technology,
1200 E. California Blvd., Pasadena, CA 91125, USA
Current address: Center for Quantum Information at Korea Institute of Science and Technology, Address. 5,
Hwarang-ro 14-gil, Seongbuk-gu, Seoul, Republic of korea
Current address: Tech4Health Institute, New York University Langone Health, New York, NY 10016, USA
Corresponding author: A.F.: faraon@caltech.edu
1
SUPPLEMENTARY NOTE 1: CREATION OF THE SLOT MODE RESONANCE
In this section, the principle of slot mode resonance creation is discussed. The idea comes from
previous research on high-Q resonances[1, 2]. In integrated photonics, a slot waveguide is used
for light propagation because its momentum is larger than the momentum of free-space light. This
bounded-state property guarantees zero radiation loss in the ideal slot waveguide. However, the
subtle periodic perturbation will compensate for the momentum mismatch and enable the radiation
into the free space. For example, by targeting
=
0
, we can couple the slot waveguide to the
z-incident light, as illustrated in Fig. 1 of the main manuscript. Specifically, the slot mode has
a dispersion relationship shown in Fig.
S1
. We wrap the dispersion curve within the range of
/
. Under this operation, the curve reaches
=
0
at a specific wavelength of
=
1591
.
6
푛푚
. In
other words, under the perturbation with period
,
will be wrapped to
0
and thus couples to the
normal incident light.
We also numerically confirm the existence of the resonance in Fig.
S2
and the properties of
perturbations. Simulations reveal three effects depending on the notch size: the blue shift from
the non-perturbed resonance wavelength, the quality factor, and the modulation amplitude. Firstly,
the geometrical perturbation by creating notches leads to the blue shift according to the first order
perturbation theory[3]. Secondly, the quality factor increases as the perturbation disappears. This
indicates that the notch size controls the radiative loss of the slot mode, and it is the origin of the
resonance. Thirdly, shown in Fig. 4 of the main manuscript, the smaller the notch size, the smaller
the modulation amplitude, which is the result of the decreasing coupling rate. In conclusion, the
notch size and notch period are two powerful knobs that enable resonance creation at a large range
of wavelengths and with arbitrary quality factors.
2
SUPPLEMENTARY NOTE 2: CALCULATION OF THE OVERLAPPING FACTOR
The interaction strength between the polymer and optical mode has previously been investigated,
including that between polymer and guided mode[4] and that between polymer and non-perturbed
slot mode[5]. The calculation formula of the overlapping factor (
Γ
) has been proposed in equation
(24) in the supplementary material of reference[4], under the quantum picture. Here, we will
provide another derivation of the same equation from the cavity perturbation theory[3].
The basic picture of the electro-optic-induced resonance shift could be decomposed in several
steps. First, the mode frequency shift is caused by the local dielectric tensor perturbation
Δ
.
Second, the local anisotropic dielectric tensor perturbation is generated by tuning the electric field
E
ext
under non-negligible electro-optic coefficient
33
. Third, the direction and the amplitude of
33
depend on the poling electric field
E
p
. Note that the bold variables
E
ext
,
E
p
means they are vectors,
and all these variables are dependent on the locations. We will walk through the calculation step
by step.
In the first step, the
th mode frequency shift
Δ
when we have a dielectric tensor perturbation
could be easily calculated by perturbation theory [3]:
Δ
=
1
2
<
E
i
,
Δ
E
i
>
<
E
i
,
E
i
>
(
S1
)
Here,
E
i
is the vector of
th mode field,
and
Δ
are the dielectric tensor of the material and its
perturbation. The inner product is the integral across the region of one period in both
and
directions, and infinity in
direction:
−∞
/
2
/
2
/
2
/
2
E
1
E
2
d
d
d
:
=
<
E
1
,
E
2
>
(
S2
)
E
1
means the conjugate transpose of the vector. In the second step, the “local" perturbation of
the dielectric tensor
Δ
is dependent on “local" electro-optic coefficient
33
. The definition of the
electro-optic coefficient is by relative impermeability
=
(
0
)
1
, and here we are only interested
in non-negligible coefficient
33
[6]:
Δ
33
=
33
|
E
ext
|
=
33
푒푥푡,푧
(
S3
)
3
We define a local coordinate system (
, 푦
, 푧
), where
axis is the same direction as the local
poling electric field
E
p
.
Δ
33
means that the variable is expressed in coordinate system (
, 푦
, 푧
).
Since the poling field and the tuning field use the same electrodes, thus under this local coordinate
system the relationship between
E
ext
and
Δ
is simpler (only
33
0
and
E
ext
=
(
0
,
0
, 퐸
ext,z’
)
),
shown in Equation
S3
. If we write the equation in tensor form, the result is:
Δ
=
E
ext
E
ext
|
E
ext
|
(
S4
)
The transformation matrix between the local axis base vectors
e
i
and the global axis base vectors
e
i
are defined by Q:
e
i
=
푖푗
e
j
(
S5
)
Then the dielectric constant perturbation could be expressed:
Δ
=
1
0
·
Δ
·
=
1
0
·
Δ
·
(
S6
)
=
1
0
33
·
E
ext
E
ext
|
E
ext
|
·
(
S7
)
=
1
0
33
·
E
ext
E
ext
|
E
ext
|
·
(
S8
)
In the third step, we need to connect the local variant
33
with the poling and the tuning voltage.
We define the poling efficiency
:
=
33
/|
E
p
|
(
S9
)
Since we are using the same electrode for poling and tuning,
E
p
and
E
ext
follow the same distri-
bution. For simplicity, we could define
E
p
=
E
ext
.
is a constant within the OEO region, and
outside OEO region
=
0
.
is number that is not dependent on the locations. Therefore, the
inner product in equation
S2
could be expressed as
<
E
i
,
Δ
E
i
>
=
1
0
<
E
i
,
·
E
ext
E
ext
·
E
i
>
(
S10
)
=
0
<
E
ext
·
E
i
,
E
ext
·
E
i
>
OEO
(
S11
)
We define the inner product
<
·
,
·
>
OEO
when the integral only includes the region of OEO
4
materials. The shift of the frequency due to electro-optic field is
Δ
=
2
0
<
E
ext
·
E
i
,
E
ext
·
E
i
>
OEO
<
E
i
,
E
i
>
(
S12
)
=
2
0
∫∫∫
poly
2
|
E
T
ext
E
|
2
d
d
d
∫∫∫
everywhere
|
E
|
2
d
d
d
(
S13
)
We made two assumptions in the equation
S13
. First, although we consider the anisotropic
perturbation of the dielectric tensor, we assume that the dielectric tensor
is isotropic. Thus we
can use a scalar
instead of tensor. Second, we assume that
E
ext
is a real vector as the tuning
source frequency is much lower compared to the optical oscillation frequency.
If we approximate the average poling field as
|
E
p
|
=
/
, then we can estimate the average
33
=
|
E
p
|
=
/
. Given tuning voltage
ext
, we could also get
=
ext
. The definition of
the overlap factor is
Δ
=
1
2
0
33
Γ
ext
(
S14
)
where
is the voltage,
is the slot gap width. Incorporate all these equations we can get the
expressions for overlapping factor,
Γ
=
2
2
ext
∫∫∫
poly
|
E
T
ext
E
i
|
2
d
d
d
∫∫∫
everywhere
|
E
|
2
d
d
d
(
S15
)
E
ext
has a linear relationship with
ext
/
, so the overlapping factor is not relevant to the externally
applied voltage.
Upon applying the above formula for the three modes discussed in the main text and the Au
strip-integrated device, we record results in Table
S1
. The overlap factor decreases slightly with
Modes
I.
II.
III.
I.(with gold)
Γ
0.156 0.017 0.015
0.127
Table S1 The overlap factor
Γ
of the optical modes discussed in Fig.2 in the main manuscript and
Fig. S3.
the integration of Au strips due to the existence of metal absorption. Also, compared to the guided
modes II and III, the slot mode achieves around one order of magnitude higher overlapping factor.
5
SUPPLEMENTARY NOTE 3: EFFECT OF ADDITIONAL METAL STRIP ON THE LOSS OF
THE SLOT MODE RESONANCE
To ensure a minimal metallic loss, metal strips are integrated at the center of the silicon rail and
have a width of
100
푛푚
. For
850
푛푚
-wide slabs, metal strips have limited effect on the overlapping
factor
Γ
, the resonance shift, and the overall absorption. Firstly,
Γ
decreases by 0.03 upon this
insertion, shown in Tab.
S1
. Secondly, informed from the simulated reflection spectra in Fig.
S3
,
the resonance shift from
=
1
.
85
to
=
1
.
87
is
2
.
71
푛푚
. Thus, the extra metal strips hardly affect
the sensitivity of the slot mode with respect to the electro-optic effect of the polymer. Finally,
the calculated quality factors of the resonances with and without metal strips are
1864
and
1979
(Fig. 2f in the main manuscript), respectively. Both quality factors are just slightly above our
experimental realization, and the effect of the metal is minimal. In conclusion, the metal strip will
only have minimal effect on the resonance property and the tuning performance.
6
SUPPLEMENTARY NOTE 4: THE SIMPLIFIED CIRCUIT MODEL AND THE RF MEA-
SUREMENT FOR THE BANDWIDTH ESTIMATION
In this section, we further discuss the simplified circuit model which has been used in Fig. 6b in
the main manuscript. The model parameters are chosen as described in the following paragraph. To
determine the capacitance in the circuit and determine the primary limiting factor of the bandwidth
in our device, we conduct electric transmission tests on different structures. The outcomes and the
modeling circuits for each structure are shown in Fig.
S4
, and the illustrations of experimental
setups are shown in Fig.
S5
.
First, we assess the bandwidth of the PCB board. The schematic diagram of the measurement
setup is shown in Fig.
S5
a, and the result is represented by the purple curve in Fig.
S4
a. It is clear
that signals below
20
MHz remain unaffected. The bandwidth of the PCB board is significantly
larger than all the other measurements; therefore, we do not take into account the effect of the PCB
on the signal bandwidth.
Next, we measure the transmission of signals
out
through the PCB and an coplanar waveguide
(CPW). Despite continuing to use a large electrode pad for wire bonding, the coplanar waveg-
uide could significantly reduce the transmission loss through the waveguide. The gold electrode
waveguide is situated on top of a thin film undoped silicon layer with a fused silica substrate[4].
The schematic diagram of the measurement setup can be seen in Fig.
S5
b. The measured data
exhibits
3
dB attenuation at
21
MHz.We model the circuit as a RC circuit shown in Fig.
S4
b. The
calculation of
load
is:
load
=
|
load
+
load
|
(
S16
)
where
load
=
1
2
휋 푓퐶
circ
. The calculated capacitive load
circ
=
262
.
5
pF.
Third, we measure the transmission spectra of signals through the PCB and the optimized RF
waveguide on the SOI wafer in air (Measurement data, circuit and diagram II in Fig.
S4
a-b and
Fig.
S5
b). The SOI wafer introduces additional capacitance
SOI’
between gold electrodes and the
doped silicon substrate. Therefore in case II,
load
=
1
2
휋 푓
(
circ
+
SOI’
)
. Based on the measurement,
the 3dB cutoff frequency is 6.8MHz. Therefore, we can estimate the capacitance of the SOI wafer
in this case as
SOI’
=
548
.
24
pF. As a sanity check, if we treat the SOI wafer capacitance as the
7
parallel plate, then the capacitance
SOI’
could be expressed as:
SOI’
=
0
SiO
2
SOI’
2
SiO
2
(
S17
)
0
is the vacuum permittivity. We can solve the area of the whole waveguide
SOI’
=
9
.
5
푚푚
2
. It
is similar to the area of the electrode design since there are two large pads for wire bonding.
As our main device doesn’t incorporate the CPW, the impedance unmatching through the
waveguide will impact the load voltage
load
. To identify other possible parasitic capacitances in
the circuit, we measure the loading voltage signal
load
with another test chip with a smaller electrode
area (Measurement data, circuit and diagram III in Fig.
S4
a-b and Fig.
S5
b). The measurement
3dB cutoff frequency is
4
MHz. In this device, we assume that
load
=
circ
+
SOI’
+
other
, which
implies that the contribution of all other factors except for the original contribution in case I and
SOI capacitance contribution in case II could be modeled as a capacitor
other
. We also assume that
the area of the electrode is the same as in case II. The result
other
=
567
.
5
pF. As such, we define
the external capacitance of our device in optical measurement
load
=
circ
+
other
=
813
.
5
pF.
The substrate contribution of the device in the main figure is determined by the electrode area
SOI
=
16
푚푚
2
in the device
SOI
/
2
=
920
.
82
pF using equation
S17
(Since in Fig. 6 of the main
manuscript the capacitance between the electrode and substrate is labeled as
SOI
). Based on all
these discussions, the final model shown in Fig. 6b of the main manuscript considers two major
capacitances,
load
and
SOI
, to capture the effect of the parasitic capacitance along the circuit and
the substrate.
Within the device, we treat the electric path across the slot as two gold nanobars
Au
, two
resistive silicon nanobars
Si
, a resistive component
OEO
and a capacitive component
OEO
.
OEO
and
OEO
are parallel connected to each other and series connected to
Si
and
Au
, as
shown in Fig. 6 of the main manuscript. The resistance of the gold nanobar can be modeled as
Au
=
Au
Au
Au
Au
=
338
Ω
, where
Au
=
2
.
2
×
10
6
Ω
·
푐푚
,
Au
=
100
휇푚
,
Au
=
65
푛푚
. Thanks to
the extruded gold electrode, the resistance of the silicon bar can be modeled as
Si
=
Si
Si
Si
Si
=
1
.
17
Ω
, where
Si
=
10
Ω
·
푐푚
,
Si
=
100
휇푚
,
Si
=
350
푛푚
,
Si
=
300
푛푚
. The resistance of
the OEO material is modelled as
OEO
=
OEO
OEO
OEO
OEO
=
200
Ω
, where
OEO
=
6
×
10
9
Ω
·
푐푚
,
OEO
=
100
휇푚
,
OEO
=
300
푛푚
. The capacitance of the polymer is modeled approximately as a
parallel capacitor, thus
OEO
=
0
OEO
OEO
OEO
OEO
=
21
.
25
fF, where
OEO
=
8
. The impedance of one
slot is then
single
=
2
Au
+
2
Si
+
OEO
, where
OEO
=
OEO
1
+
2
휋 푓퐶
OEO
. Thus, the total impedance of
8
the device is
dev
=
single
/
slot
where
slot
=
90
.
Finally, incorporating all previous calculations we can get:
OEO
=
dev
total
OEO
single
(
S18
)
The calculated result is shown in Fig. 6a in the main manuscript.
9
SUPPLEMENTARY NOTE 5: DISCUSSION ON THE STRATEGIES OF BANDWIDTH IM-
PROVEMENT
Based on the discussion in supplementary note 4, we have identified the source factor of the
bandwidth limitation. To increase the bandwidth of the device, we suggest the following strategies:
Use doped silicon on fused silica wafer to remove
SOI
. This type of wafer will require the
development of a specialized fabrication process, but it could be potentially constructed by
ion implantation and annealing. This improvement could be supported by experiments I and
II, as the replacement of the wafer will lead to the increase of the bandwidth in experiment I.
The design and implementation of a microwave coplanar waveguide, combined with the use
of a probe instead of wire bonding and meticulous removal of possible parasitic capacitance
in the circuit, could effectively minimize
load
, and it has been shown in ref. [7]. We expect
that in ideal case the bandwidth should only be restricted by
Au
,
Si
,
OEO
and
OEO
.
The careful adjustment of doping levels, device length, and device geometry to tailor them
toward achieving GHz bandwidth presents another feasible avenue for optimization. As
shown in supplementary note 4, the bandwidth limitation by
Au
,
Si
,
OEO
and
OEO
is
approximately
1
/(
2
(
Si
+
Au
)
OEO
)
=
4
.
8
GHz. The bandwidth could be further improved
if we reduce the device length or increase the doping levels.
Therefore, we believe the silicon-organic electro-optic modulation device based on slot waveguide
could achieve GHz bandwidth.
10
SUPPLEMENTARY NOTE 6: FABRICATION AND POLING WORKFLOWS, MEASURE-
MENT SETUP
The detailed fabrication workflow is shown in Fig.
S6
.
The measurement setup , which has been discussed in detail in our previous report[8], is shown
in Figure
S7
.
11
SUPPLEMENTARY NOTE 7: DEVICE PARAMETER DETAILS
We list the parameter details of the devices simulated or fabricated in the main figures. The
symbols for the geometrical parameters are labeled in Fig.
S8
. All devices are fabricated using an
SOI wafer with a 300-nm device layer and a 300-nm BOX layer. For fabricated devices, the listed
parameters are the design layout parameters with estimated geometry shifts due to fabrication. We
estimate the geometry shift by the SEM image of other devices on the same chip.
Device
푝 푤
푑 푙 푤
Figure 2 740 90 850 50 120 N/A
Figure 4 Varied 100 830 Varied Varied 100
Figure 5a 720 90 840 60 130 100
Figure 5b 900 80 650 55 133 100
Figure 5c 880 80 650 55 133 100
Table S2
Device parameters used for the plot in main figures (unit: nm). N/A: not applicable. Varied: the
certain parameter is a variable in the main figures.
12
Figure S1 Band diagram of the slot mode without perturbation
. The calculated slot mode wavelength
for different in-slot momentum
along the slot. The in-slot momentum is wrapped under the unit of
/
where
=
740
푛푚
. At
=
1591
.
6
푛푚
,
=
0
, indicating that the perturbation in the
740
푛푚
period will
open the resonance at this wavelength.
13