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DeHon, André and Rubin, Raphael (2004) Design of FPGA interconnect for multilevel metallization. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 12 (10). pp. 1038-1050. ISSN 1063-8210. doi:10.1109/TVLSI.2004.827562. https://resolver.caltech.edu/CaltechAUTHORS:DEHieeetvlsis04a

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