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Vaidyanathan, P. P. (1985) Efficient and multiplierless design of FIR filters with very sharp cutoff via maximally flat building blocks. IEEE Transactions on Circuits and Systems, 32 (3). pp. 236-244. ISSN 0098-4094. https://resolver.caltech.edu/CaltechAUTHORS:VAIieeetcs85g

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