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Items where Person is "Pénzes-P-I"

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Jump to: 2002 | 2001 | 1998
Number of items: 6.

2002

Pénzes, Paul I. and Nyström, Mika and Martin, Alain J. (2002) Transistor sizing of energy-delay-efficient circuits. In: TAU '02 Proceedings of the 8th ACM/IEEE international workshop on Timing issues in the specification and synthesis of digital systems. ACM , New York, NY, pp. 126-133. ISBN 1-58113-526-2. https://resolver.caltech.edu/CaltechAUTHORS:20161207-170651411

Pénzes, Paul I. and Martin, Alain J. (2002) Energy-Delay Efficiency of VLSI Computations. In: GLSVLSI '02 Proceedings of the 12th ACM Great Lakes symposium on VLSI. ACM , New York, NY, pp. 104-111. ISBN 1-58113-462-2. https://resolver.caltech.edu/CaltechAUTHORS:20161207-165804629

Pénzes, Paul I. (2002) An Energy Estimation Method for Asynchronous Circuits with Application to an Asynchronous Microprocessor. In: Proceedings 2002 Design, Automation and Test in Europe Conference and Exhibition. IEEE Computer Society , Los Alamitos, CA, pp. 640-647. ISBN 0-7695-1471-5. https://resolver.caltech.edu/CaltechAUTHORS:20161207-164644888

Pénzes, Paul I. and Nyströem, Mika and Martin, Alain J. (2002) Transistor Sizing of Energy-Delay-Efficient Circuits. California Institute of Technology , Pasadena, CA. doi:10.7907/Z9ZG6Q7T. (Unpublished) https://resolver.caltech.edu/CaltechCSTR:2002.003

2001

Pénzes, Paul I. and Martin, Alain J. (2001) Global and local properties of asynchronous circuits optimized for energy efficiency. California Institute of Technology , Pasadena, CA. doi:10.7907/Z9FJ2DSS. (Unpublished) https://resolver.caltech.edu/CaltechCSTR:2002.002

1998

Pénzes, Paul I. (1998) The design of high performance asynchronous circuits for the Caltech MiniMIPS processor. California Institute of Technology , Pasadena, CA. doi:10.7907/Z90V89TB. (Unpublished) https://resolver.caltech.edu/CaltechCSTR:2002.001

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