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Published December 2012 | metadata_only
Journal Article

Power-aware speed scaling in processor sharing systems: Optimality and robustness


Adapting the speed of a processor is an effective method to reduce energy consumption. This paper studies the optimal way to scale speed to balance response time and energy consumption under processor sharing scheduling. It is shown that using a static rate while the system is busy provides nearly optimal performance, but having a wider range of available speeds increases robustness to different traffic loads. In particular, the dynamic speed scaling optimal for Poisson arrivals is also constant-competitive in the worst case. The scheme that equates power consumption with queue occupancy is shown to be 10-competitive when power is cubic in speed.

Additional Information

© 2012 Elsevier B.V. Received 9 July 2010. Received in revised form 11 July 2012. Accepted 16 July 2012. Available online 25 July 2012. This work was supported by grants from the NSF CCF 0830511, CCS 0835706 and CNS 0435520, Microsoft Research, IBM Faculty Award, the Lee Center for Advanced Networking and the Australian Research Council grant FT0991594.

Additional details

August 22, 2023
August 22, 2023