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Published May 1995 | Published
Book Section - Chapter Open

A High-Resolution Non-Volatile Analog Memory Cell


A 3-transistor non-volatile analog storage cell with 14 bits effective resolution and rail-to-rail buffered voltage output is presented. The memory, which consists of charge stored on a MOS transistor floating gate, is written by means of hot-electron injection and erased by means of gate oxide tunneling. The circuit allows simultaneous memory reading and writing; by writing the memory under feedback control, errors due to oxide mismatch or trapping can be nearly eliminated, Small size and low power consumption make the cell especially attractive for use in analog neural networks. The cell is fabricated in a 2 μm n-well silicon Bi-CMOS process available from MOSIS.

Additional Information

© 1995 IEEE. This work was sponsored by a TRW graduate Fellowship and by the Office of Naval Research, ARPA, and the Beckman Foundation.

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