Wafer bonding and layer transfer processes for 4-junction high efficiency solar cells
A four-junction cell design consisting of InGaAs, InGeAsP, GaAs, and Ga0.5In0.5P subcells could reach 1 x AMO efficiencies of 35.4%. but relies on the integration of non-lattice-matched materials. Wafer bonding and layer transfer processes show promise in the fabrication of InP/Si epitaxial templates for growth of the bottom InGaAs and InGaAsP subcells on a Si support substrate. Subsequent wafer bonding and layer transfer of a thin Ge layer onto the lower subcell stack can serve as an epitaxial template for GaAs and Ga0.5In0.5P subcelis. Present results indicate that optically active III/V compound semiconductors can be grown on both Ge/Si and InP/Si heterostructures. Current-voltage electrical characterization of the interfaces of these structures indicates that both InP/Si and Ge/Si interfaces have specific resistances lower than 0.1 Ωcm^2 for heavily doped wafer bonded interfaces, enabling back surface power extraction from the finished cell structure.
Additional Information© 2002 IEEE. Reprinted with permission. Publication Date: 19-24 May 2002. The authors would like to acknowledge Lynn Gedvilas for measuring the FTPL data and Jeffrey Carapella for performing the MOVPE growths. This work has been supported by NASA and the National Renewable Energy Laboratory.
Published - ZAHpsc02.pdf