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Published August 1, 2004 | public
Journal Article Open

Bandwidth Enhancement for Transimpedance Amplifiers


A technique for bandwidth enhancement of a given amplifier is presented. Adding several interstage passive matching networks enables the control of transfer function and frequency response behavior. Parasitic capacitances of cascaded gain stages are isolated from each other and absorbed into passive networks. A simplified design procedure, using well-known low-pass filter component values, is introduced. To demonstrate the feasibility of the method, a CMOS transimpedance amplifier (TIA) is implemented in a 0.18-μm BiCMOS technology. It achieves 3 dB bandwidth of 9.2 GHz in the presence of a 0.5-pF photodiode capacitance. This corresponds to a bandwidth enhancement ratio of 2.4 over the amplifier without the additional passive networks. The trans-resistance gain is 54 dB[ohm], while drawing 55 mA from a 2.5-V supply. The input sensitivity of the TIA is -18 dBm for a bit error rate of 10^-12.

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"©2004 IEEE. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE." Manuscript received December 9, 2003; revised March 19, 2004. The authors would like to thank Jazz Semiconductor (formerly Conexant Systems) for fabricating the chip and M. Racanelli, S. Stetson, and A. Karroy for their support. They also acknowledge I. Aoki, H. Hashemi, D. Ham, J. Buckwalter, C. White, A. Komijani, H. Wu, S. Mukhtar, and S. Kee from Caltech's CHIC group for useful discussions and comments on the manuscript. They would also like to thank the Lee Center for Advanced Networking for supporting this project.


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August 22, 2023
August 22, 2023