Acceptor-Induced Bulk Dielectric Loss in Superconducting Circuits on Silicon
Abstract
The performance of superconducting quantum circuits is primarily limited by dielectric loss due to interactions with two-level systems (TLSs). State-of-the-art circuits with engineered material interfaces are approaching a limit where dielectric loss from bulk substrates plays an important role. However, a microscopic understanding of dielectric loss in crystalline substrates is still lacking. In this work, we show that boron acceptors in silicon constitute a TLS bath that leads to an energy dissipation channel for superconducting circuits. We discuss how the electronic structure of boron acceptors leads to an effective TLS response in silicon. We sweep the boron concentration in silicon and demonstrate the bulk dielectric loss limit from boron acceptors. We show that boron-induced dielectric loss can be reduced in a magnetic field due to the spin-orbit structure of boron. This work provides the first detailed microscopic description of a TLS bath for superconducting circuits and demonstrates the need for ultrahigh-purity substrates for next-generation superconducting quantum processors.
Copyright and License
Published by the American Physical Society under the terms of the Creative Commons Attribution 4.0 International license. Further distribution of this work must maintain attribution to the author(s) and the published article’s title, journal citation, and DOI.
Acknowledgement
We thank Xueyue Zhang for fruitful discussions, as well as Mi Lei and Shimon Kolkowitz for feedback on the manuscript. This work was primarily funded by the U.S. Department of Energy, Office of Science, Basic Energy Sciences, Materials Sciences and Engineering Division under Contract No. DE-AC02-05CH11231 within the Nanomachine Program (device design and measurements). Material characterization (SIMS) and cryogenic rf instrumentation is supported by the U.S. Department of Energy, Office of Science, Office of Basic Energy Sciences, Materials Sciences and Engineering Division under Contract No. DE-AC02-05-CH11231 in the Phonon Control for Next-Generation Superconducting Systems and Sensors FWP (KCAS23). Additional support was provided for device fabrication and lithography development by the Air Force Office of Scientific Research and the Office of Naval Research under Grant No. FA9550-23-1-0333. The devices used in this work were fabricated at UC Berkeley’s NanoLab.
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Additional details
- United States Department of Energy
- DE-AC02-05CH11231
- United States Air Force Office of Scientific Research
- Office of Naval Research
- FA9550-23-1-0333
- Accepted
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2024-09-09Accepted
- Caltech groups
- Institute for Quantum Information and Matter
- Publication Status
- Published