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Published June 29, 2001 | Submitted
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A VLSI Based Real-Time Hidden Surface Elimination Display System


This thesis describes a novel approach to the problem of generating dynamic TV raster displays for real-time simulation (such as for visual flight simulation). In particular, the most time consuming part of generating such displays, the hidden surface elimination, is performed using many identical custom VLSI processors. Each processor is assigned a surface and for each pixel, all processors compete to decide which object is visible. It is found that this approach leads to a practical system which is conceptually and practically simple, expandable, and reliable.

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August 19, 2023
January 13, 2024