Holistic Co-Design of Electronics and Photonics for High-Speed Optical Interconnects in SiP and CMOS Platforms

Data centers continue to demand interconnect solutions with increasingly higher bandwidth densities and improved energy efficiency, both for connections within and between data centers. Furthermore, applications such as chip-to-chip interconnects in data center switches, high-performance field programmable gate arrays (FPGAs), and graphics processing units (GPUs) call for compact form-factors, high-volume production and low-cost. Silicon Photonics (SiP)-based transceivers, when co-packaged with CMOS electronics, offer a promising avenue to meet these demands with speeds exceeding 100 Gb/s per wavelength. Additionally, they have the capability to support higher-order modulation schemes in the optical domain, such as multilevel Pulse Amplitude Modulation (PAM-N) and Multi-point Quadrature-Amplitude Modulation (QAM-N) schemes, thereby enhancing bandwidth densities. Achieving improved electro-optical bandwidth density while maintaining optimized power efficiency necessitates addressing the optical power penalty associated with photonic integrated circuits. Furthermore, the co-optimization of electronic and photonic components provides a pathway towards achieving sub-pJ/b transmission efficiency.